There are many different types of analog-to-digital converters. Analog-to-digital converters which have a single ended structure are generally sensitive to cross-talk from other circuits on a chip. They are also sensitive to power supply noise, and di/dt effects and other forms of common mode generated noise. In addition, this type of converter will produce a high degree of unwanted asymmetrical voltage output due to miss-balances in the positive versus negative scales.
To counter these disadvantages, switching capacitors with differential integration have been applied. However, this approach is not entirely successful, since this type of structure is sensitive to clocks feed-through, and requires precisely matched capacitance. In the fabrication of these devices on a chip using a CMOS process, such structures require an additional masking step.
The linear, time continuous, over-sampling analog-to-digital converter of the present invention is constructed utilizing a 1.2u CMOS process, which is described in AMD DSLAC DESIGN REVIEW I & II (1987). The analog-to-digital converter of this invention operates in the differential mode and provides the capability of delivering up to the high dynamic range without the use of any switch capacitance techniques or the use of precisely matched capacitances.
The converter of the invention can be used in audio applications, such as for CODECs and MODEMs, particularly where such devices operate together in a noisy environment.